Single transistor primitive for timing and power modelling of CMOS gates

An accurate and e cient method for modelling CMOS gates by a single equivalent transistor is introduced in this paper. The output waveform of a CMOS inverter is obtained by solving the circuit di€ erential equation considering only the conducting transistor of the inverter. The e€ ect of the short-circuiting transistor is incorporated as a di€ erentiation of the width of the conducting transistor. The proposed model is the simplest primitive that can be used in order to obtain the propagation delay and short-circuit power dissipation of CMOS gates. Consequently, it can o€ er signi® cant speed improvement to existing dynamic timing and power simulators while maintaining a su cient level of accuracy.